GCSE · Computer Science · Edexcel · Spec 1CP2
Registers
Tucked inside the CPU are a few tiny, very fast stores called registers. Follow one instruction through them and you have the whole fetch-decode-execute cycle.
Computer Science · Inside the CPU
Follow one instruction through the registers
The PC holds 20. Memory address 20 holds the instruction LOAD 51 (‘copy the value stored at address 51 into the accumulator’), and address 51 holds the value 9. Step through one whole fetch-decode-execute cycle.
Press Next › one step at a time. Before each step, predict which box will change — and whether its new value is an address, an instruction or data.
Phase: Fetch
PC
20
MAR
—
Address bus
—
Data bus
—
MDR
—
CIR
—
Accumulator
—
Output
Start: PC = 20 (an address)
Step 1: Everything starts at the program counter. It holds 20. That isn't an instruction — it's the ADDRESS in memory where the next instruction is waiting.
A dash (—) means empty so far — or, on a bus, that nothing is travelling at this step. Addresses are shown in denary and the instruction in words to keep them readable; the CPU itself holds them as binary. The log above builds up every move you've seen.
Computer Science · Structure
Zoom out: where the registers live
Tap each box to see its job. The registers sit inside the CPU with the control unit, the ALU and the clock. Main memory is outside, joined by the address bus and the data bus.
Tap any part of the diagram to see what it does.
Name that register
Tap a description, then tap the register that holds it. Ask yourself first: is it an address, an instruction or data?
Still to sort
PC — program counter (0)
Holds an address.
Where the line is: PC: the address of the NEXT instruction. MAR: the address being accessed right now, whether that's an instruction's or some data's.
MAR — memory address register (0)
Holds an address.
Where the line is: MAR: where to look. MDR: what was found there.
MDR — memory data register (0)
Holds whatever has just been fetched.
Where the line is: MDR: whatever has just arrived, instruction or data. CIR: an instruction, and nothing else.
CIR — current instruction register (0)
Holds an instruction.
Where the line is: CIR: the instruction itself. PC: just the address of the next one.
Accumulator (0)
Holds data.
Where the line is: Accumulator: data for a calculation, or its result. MDR: data that has only just arrived.
Five registers, eight descriptions. Commit to an answer before you read why.
WHAT YOU'VE LEARNED
A quick recap of today's lesson.
Five small stores, one question each: is this an address, an instruction or data?
What you need to know
- Registers are very small, very fast memory locations inside the CPU, and each type of register has its own job.
- Each register holds one kind of value: the PC and MAR hold addresses, the CIR holds an instruction, the accumulator holds data — and the MDR holds whatever has just arrived from memory.
- The address bus takes an address from the MAR to main memory; the data bus brings the instruction or data back into the MDR.
- Fetch runs PC → MAR → memory → MDR → CIR, with the PC increased by one; the control unit then decodes the instruction in the CIR.
The big picture
Registers are very small, very fast memory locations inside the CPU, and each type has its own job. The program counter (PC) holds the address of the next instruction to fetch. The memory address register (MAR) holds the address about to be accessed in main memory. The memory data register (MDR) holds whatever has just been fetched, instruction or data. The current instruction register (CIR) holds the instruction being decoded and executed. The accumulator holds data used in calculations and their results. In each fetch-decode-execute cycle, values pass between these registers and main memory along the address bus and the data bus.
Key points
Worked example
Problem
A CPU's program counter holds 34. Memory address 34 holds the instruction LOAD 70, and memory address 70 holds the value 15. When this instruction has been fetched, decoded and executed, what will the PC, CIR, MAR, MDR and accumulator hold?
⚠ Watch out
Mixing up the MAR and the MDR. The MAR holds an ADDRESS — where in memory to look. The MDR holds what was FOUND there — the instruction or data that came back. A for Address; D for the data (or instruction) that comes back.
Memory hook
Ask every register one question: ‘Address, instruction or data?’ The PC and MAR answer ADDRESS. The CIR answers INSTRUCTION. The accumulator answers DATA. And the MDR is the doorway — it takes whatever comes through.
Check yourself
Mid-fetch, the MDR has just received LOAD 63 and the PC still holds 17. What happens next to each? (Answer: LOAD 63 is copied into the CIR, and the PC becomes 18.)
Flashcards
(12)What is a register?
Registers are one key component inside the CPU. Name the others.
What does the PC hold — and what happens to it after each fetch?
What does the MAR hold, and which bus does it use?
What does the MDR hold?
What does the CIR hold, and what happens to it?
What does the accumulator hold?
Which bus carries an address to memory, and which brings things back?
An instruction arrives from memory. Which register does it enter first, and where does it go next?
During the execute stage of a load, what happens to the MAR, the MDR and the accumulator?
Two registers hold addresses. Which two, and what's the difference?
Is data loaded from memory ever copied into the CIR?
Tap any card to flip it, or use Study as deck to go through them one at a time. In the full lesson these run as a spaced-repetition deck — you rate each card Hard, Good or Easy and the tricky ones keep coming back until they stick.
Learning with Lightbulb is opening soon
You can use this lesson now. Join the waitlist and we'll let you know when the full Lightbulb experience is ready.
Keep me postedMore Edexcel GCSE Computer Science topics
How this lesson was checked. This Edexcel GCSE Computer Science (specification 1CP2)lesson was published through Lightbulb Learning's human-designed editorial process — the educational standards, accuracy rules and publication checks it must pass were authored and approved by Philip Halpin. It passed subject-specific assessment, automated educational checks and technical publication verification before going live (publication checks completed 30 September 2026). Published pages are monitored, human spot-checking is ongoing across the lesson library, and anything found wrong is corrected or withdrawn. How our lessons are made and checked. Spotted a mistake? Email hello@lightbulblearning.co and we'll review it.